Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan3E
OS Platform: NT64 Target Device: xc3s100e
Project ID (random number) fd692458937e471596edc4ad7b3a4fb9.83F50767A9D54D799ACAF284D8D45E52.2 Target Package: cp132
Registration ID 174556397_0_0_411 Target Speed: -4
Date Generated 2014-05-29T17:10:48 Tool Flow ISE
 
User Environment
OS Name Microsoft , 64-bit OS Release major release (build 9200)
CPU Name AMD FX(tm)-8350 Eight-Core Processor CPU Speed 4335 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Registers=4
  • Flip-Flops=4
 		MiscellaneousStatistics
  • AGG_BONDED_IO=37
  • AGG_IO=37
  • AGG_SLICE=8
  • NUM_4_INPUT_LUT=12
  • NUM_BONDED_IBUF=33
  • NUM_BONDED_IOB=4
  • NUM_BUFGMUX=1
  • NUM_IOB_FF=4
  • NUM_SLICEL=8
 		NetStatistics
  • NumNets_Active=83
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=4
  • NumNodesOfType_Active_CNTRLPIN=4
  • NumNodesOfType_Active_DOUBLE=38
  • NumNodesOfType_Active_DUMMY=45
  • NumNodesOfType_Active_DUMMYESC=33
  • NumNodesOfType_Active_GLOBAL=9
  • NumNodesOfType_Active_HUNIHEX=3
  • NumNodesOfType_Active_INPUT=41
  • NumNodesOfType_Active_IOBOUTPUT=33
  • NumNodesOfType_Active_OMUX=29
  • NumNodesOfType_Active_OUTPUT=13
  • NumNodesOfType_Active_PREBXBY=5
  • NumNodesOfType_Active_VUNIHEX=4
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_INPUT=4
  • NumNodesOfType_Vcc_VCCOUT=5
 SiteStatistics
  • IBUF-DIFFM=15
  • IBUF-DIFFMI=1
  • IBUF-DIFFS=13
  • IBUF-DIFFSI=1
  • IBUF-IOB=1
  • IOB-DIFFM=1
  • IOB-DIFFS=2
  • SLICEL-SLICEM=3
 		SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IBUF=33
  • IBUF_INBUF=33
  • IBUF_PAD=33
  • IOB=4
  • IOB_OFF1=4
  • IOB_OUTBUF=4
  • IOB_PAD=4
  • SLICEL=8
  • SLICEL_F=8
  • SLICEL_G=4
 
Configuration Data
BUFGMUX
  • S=[S_INV:1] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
  • S=[S_INV:1] [S:0]
 IBUF_PAD
  • IOATTRBOX=[LVCMOS25:33]
 IOB
  • O1=[O1_INV:0] [O1:4]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:4]
  • SR=[SR:4] [SR_INV:0]
 IOB_OFF1
  • CK=[CK:4] [CK_INV:0]
  • D=[D:4] [D_INV:0]
  • LATCH_OR_FF=[FF:4]
  • OFF1_INIT_ATTR=[INIT0:4]
  • OFF1_SR_ATTR=[SRLOW:4]
  • OFFATTRBOX=[SYNC:4]
  • SR=[SR:4] [SR_INV:0]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:4]
 IOB_PAD
  • DRIVEATTRBOX=[12:4]
  • IOATTRBOX=[LVCMOS25:4]
  • SLEW=[SLOW:4]
 
Pin Data
BUFGMUX
  • I0=1
  • O=1
  • S=1
 BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
 BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
 IBUF
  • I=33
  • PAD=33
 IBUF_INBUF
  • IN=33
  • OUT=33
 IBUF_PAD
  • PAD=33
 IOB
  • O1=4
  • OTCLK1=4
  • PAD=4
  • SR=4
 IOB_OFF1
  • CK=4
  • D=4
  • Q=4
  • SR=4
 IOB_OUTBUF
  • IN=4
  • OUT=4
 IOB_PAD
  • PAD=4
 SLICEL
  • F1=8
  • F2=8
  • F3=4
  • F4=4
  • G1=4
  • G2=4
  • G3=4
  • G4=4
  • X=8
  • Y=4
 SLICEL_F
  • A1=8
  • A2=8
  • A3=4
  • A4=4
  • D=8
 SLICEL_G
  • A1=4
  • A2=4
  • A3=4
  • A4=4
  • D=4
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • vhdtdtfi -prj <design> -o <ise_file> -module <design> -template <fname>.tft -deleteonerror -lib work <fname>.vhd
  • vhdtdtfi -lib work <fname>.vhd -prj <design> -o <fname>.spl -module <design> -template <fname>.tft -deleteonerror
  • spl2sym -intstyle ise -family spartan3e <fname>.spl {D:/e-kool/Koostatud programmid Tarmo <fname>.sym}
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -i -p xc3s100e-cp132-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s100e-cp132-4 <ise_file> <fname>.ngd
  • map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • netgen -intstyle ise -s 4 -pcf <fname>.pcf -rpw 100 -tpw 0 -ar Structure -tm <design> -w -dir netgen/map -ofmt vhdl -sim <fname>.ncd <fname>.vhd
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
bitgen 19 19 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
map 23 21 0 0 0 0 0
netgen 1 1 0 0 0 0 0
ngdbuild 23 23 0 0 0 0 0
par 21 21 0 0 0 0 0
trce 22 22 0 0 0 0 0
xps 1 1 0 0 0 0 0
xst 136 128 0 0 0 0 0
 
Project Statistics
PROPEXT_xilxSynthMaxFanout_virtex2=100000 PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_SelectedInstanceHierarchicalPath=/test_1
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2014-05-08T09:09:24
PROP_intWbtProjectID=83F50767A9D54D799ACAF284D8D45E52 PROP_intWbtProjectIteration=2
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed PROP_selectedSimRootSourceNode_behav=work.test_1
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan3E PROP_DevDevice=xc3s100e
PROP_DevFamilyPMName=spartan3e PROP_DevPackage=cp132
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-4
PROP_PreferredLanguage=VHDL FILE_UCF=1
FILE_VHDL=2
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDR=4 NGDBUILD_NUM_IBUF=32 NGDBUILD_NUM_LUT2=4
NGDBUILD_NUM_LUT4=8 NGDBUILD_NUM_OBUF=4 NGDBUILD_NUM_VCC=1
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDR=4 NGDBUILD_NUM_IBUF=32 NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_LUT2=4 NGDBUILD_NUM_LUT4=8 NGDBUILD_NUM_OBUF=4 NGDBUILD_NUM_VCC=1
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s100e-4-cp132 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=100000 -bufg=24
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5